Electronic Devices — Easy Practice (Set 1)

Quick Recap — Semiconductors

• Intrinsic (pure Si/Ge): electrons equal holes; conductivity rises with temperature.
• Extrinsic (doped): n-type from pentavalent donors (majority electrons), p-type from trivalent acceptors (majority holes) — both are electrically neutral.
• Energy bands: conductors have overlapping bands (gap $\approx 0$); semiconductors have a small gap ($\approx 1$ eV; Si 1.1, Ge 0.7); insulators have a large gap ($> 3$ eV).
• Carriers: current is carried by both electrons and holes, and a hole behaves like a positive charge.
• Mass-action law: $n_e\,n_h = n_i^2$ at a given temperature.

Beyond-NCERT JEE Formulae

A compact working sheet for the semiconductor numericals JEE Main rewards but NCERT states only in words. The qualitative recap (band gaps, doping, depletion, biasing) sits in Sections 1 and 3; here we go straight to the formulae, when to use each, and the traps.

1. Carrier Density and Conductivity

Both carriers drift, so both appear in the conductivity:

$$\sigma = e\,(n_e\mu_e + n_h\mu_h)$$

At a fixed temperature the two densities are locked by the mass-action law:

$$n_e n_h = n_i^2$$

• Intrinsic sample: $n_e = n_h = n_i$, so $\sigma_i = e\,n_i(\mu_e + \mu_h)$.
• Heavily doped n-type: electrons swamp holes, so $\sigma \approx e\,n_e\mu_e$; for p-type, $\sigma \approx e\,n_h\mu_h$.
• Minority density: once doping fixes the majority carrier, get the other from $n_h = \dfrac{n_i^2}{n_e}$ (n-type) or $n_e = \dfrac{n_i^2}{n_h}$ (p-type).
• Resistivity and resistance: $\rho = \dfrac{1}{\sigma}$ and $R = \dfrac{L}{\sigma A}$; drift speed $v_d = \mu E$ with field $E = \dfrac{V}{L}$.

When to use. Given mobilities and densities, compute $\sigma$ directly; given a doped sample, use mass action for the minority carrier first.

[JEE Tip] Keep both mobilities ($\mu_e + \mu_h$) for an intrinsic sample, but drop the minority term the instant the sample is doped. Slipping a hole term into a doped $\sigma$ (wrongly near-doubling it) is the commonest conductivity mistake.

2. Diode Resistance and Ideal-Diode Analysis

• Static (dc) resistance: $R_{dc} = \dfrac{V}{I}$, the ratio at one point.
• Dynamic (ac) resistance: $r = \dfrac{\Delta V}{\Delta I}$, the slope of the V-I curve — what a small signal actually sees. On the steep forward branch it is far below $R_{dc}$.
• Ideal diode: a short ($0\ \Omega$) when forward biased, an open circuit when reverse biased. Solve the network only after deleting every reverse-biased branch.
• Constant-drop model: a conducting diode holds a fixed $V_D \approx 0.7$ V (Si) or $0.3$ V (Ge), so $I = \dfrac{V_{supply} - V_D}{R}$; diodes in series add their drops.

[JEE Tip] "Resistance of a diode" is deliberately ambiguous: from a single point they mean $\dfrac{V}{I}$; from a table or a small change they mean the slope $\dfrac{\Delta V}{\Delta I}$. The two can differ tenfold.

3. Rectifiers, Ripple and Zener Regulation

With peak current $I_m = \dfrac{V_m}{R}$, the average and rms outputs are:

• Half-wave: $I_{dc} = \dfrac{I_m}{\pi}$, $I_{rms} = \dfrac{I_m}{2}$, ripple frequency $f_r = f$.
• Full-wave / bridge: $I_{dc} = \dfrac{2I_m}{\pi}$, $I_{rms} = \dfrac{I_m}{\sqrt{2}}$, ripple frequency $f_r = 2f$.

Ripple factor (how much ac survives the rectifier):

$$r = \sqrt{\left(\dfrac{I_{rms}}{I_{dc}}\right)^2 - 1}$$

giving $r = 1.21$ (half-wave) and $r = 0.48$ (full-wave) — smaller is smoother.

• Rectifier efficiency: $\eta = \dfrac{P_{dc}}{P_{ac}} = \dfrac{I_{dc}^2}{I_{rms}^2}$ (ideal diodes), so half-wave peaks at $\dfrac{4}{\pi^2}$ (about 40.6%) and full-wave at $\dfrac{8}{\pi^2}$ (about 81.2%).
• Capacitor-filter ripple: $\Delta V = \dfrac{I}{2fC}$ (full-wave; use $\dfrac{I}{fC}$ for half-wave), with dc level $V_{dc} = V_m - \dfrac{\Delta V}{2}$.

Zener regulator (series $R_s$, load $R_L$ across the Zener): the resistor carries the total current, then the node splits it —

$$I_s = \dfrac{V_{in} - V_Z}{R_s}, \qquad I_L = \dfrac{V_Z}{R_L}, \qquad I_Z = I_s - I_L$$

with Zener power $P_Z = V_Z I_Z$ (its own current only).

[JEE Tip] In regulation $I_s$ is fixed by $V_{in}$, $V_Z$ and $R_s$; only the split changes. The Zener runs hottest at no load, where $I_Z = I_s$, so size it for $I_Z \le \dfrac{P_{Z,max}}{V_Z}$.

4. Transistor Gains and Amplifier Action

Kirchhoff at the device gives $I_E = I_B + I_C$, with $\alpha$ just below 1. The two current gains and their links are

$$\alpha = \dfrac{I_C}{I_E}, \qquad \beta = \dfrac{I_C}{I_B}, \qquad \beta = \dfrac{\alpha}{1-\alpha}, \qquad \alpha = \dfrac{\beta}{1+\beta}$$

so that $I_E = (1+\beta)I_B$.

• CE voltage gain: $A_v = \beta\,\dfrac{R_C}{R_{in}}$ (with a 180-degree phase inversion); output swing $\Delta V_{out} = \Delta I_C R_C$.
• Transconductance: $g_m = \dfrac{\Delta I_C}{\Delta V_{BE}}$, so the gain is also $A_v = g_m R_C$.
• Power gain: $A_p = \beta \times A_v = \beta^2\,\dfrac{R_C}{R_{in}}$.

[JEE Tip] $\beta$ divides by $I_B$, not $I_E$: note $\dfrac{I_E}{I_B} = 1+\beta$ and $\dfrac{1}{1-\alpha} = 1+\beta$ (not $\beta$). Common-base current gain $\alpha$ is below 1, yet the stage still delivers a large voltage gain.

5. Logic Gates and Boolean Algebra

• AND: $Y = A\cdot B$ — output 1 only when all inputs are 1.
• OR: $Y = A + B$ — output 1 when any input is 1.
• NOT: $Y = \overline{A}$ — the inverter.
• NAND: $Y = \overline{A\cdot B}$ — output 0 only when all inputs are 1.
• NOR: $Y = \overline{A + B}$ — output 1 only when all inputs are 0.
• XOR: $Y = A\oplus B = A\overline{B} + \overline{A}B$ — output 1 when the inputs differ.
• XNOR: $Y = \overline{A\oplus B} = AB + \overline{A}\,\overline{B}$ — output 1 when the inputs are equal.

De Morgan's theorems: $\overline{A + B} = \overline{A}\cdot\overline{B}$ and $\overline{A\cdot B} = \overline{A} + \overline{B}$ — the key to collapsing a gate network. Universal gates: NAND and NOR each build any function on their own; a NAND (or NOR) with its inputs tied together is a NOT, since $\overline{A\cdot A} = \overline{A}$, and two inversions cancel because $\overline{\overline{A}} = A$.

[JEE Tip] Collapse a multi-gate network to one Boolean expression and simplify with De Morgan before substituting values — reading off the equivalent single gate beats tracing every row of the truth table.

Solved Examples — Beyond-NCERT Formulae

Each example applies one tool from the sheet above; several are cross-checked by a second route.

Example 1 — Alpha-beta interconversion and currents

Given: a common-emitter transistor with $\beta = 120$ and base current $I_B = 25\ \mu$A.

Formula: $I_C = \beta I_B$, then $\alpha = \dfrac{\beta}{1+\beta}$ and $I_E = I_C + I_B$.

Working: collector current $I_C = 120 \times 25 = 3000\ \mu$A $= 3.0$ mA; common-base gain $\alpha = \dfrac{120}{1+120} = \dfrac{120}{121} = 0.992$; emitter current $I_E = 3.0 + 0.025 = 3.025$ mA. Cross-check: $\dfrac{I_C}{I_E} = \dfrac{3.0}{3.025} = 0.992$, which is $\alpha$ as expected.

Answer: $\alpha = 0.992$, $I_C = 3.0$ mA and $I_E = 3.025$ mA.

Example 2 — Dynamic resistance from a V-I table

Given: a silicon diode's forward characteristic reads $I = 5$ mA at $V = 0.60$ V, $I = 10$ mA at $V = 0.65$ V, and $I = 20$ mA at $V = 0.70$ V.

Formula: dynamic resistance $r = \dfrac{\Delta V}{\Delta I}$; static resistance $R_{dc} = \dfrac{V}{I}$.

Working: over the last step $\Delta V = 0.70 - 0.65 = 0.05$ V and $\Delta I = 20 - 10 = 10$ mA $= 0.010$ A, so $r = \dfrac{0.05}{0.010} = 5\ \Omega$. The static resistance at the $0.70$ V point is $R_{dc} = \dfrac{0.70}{0.020} = 35\ \Omega$ — seven times larger, since the curve is nowhere near a straight line through the origin.

Answer: dynamic $r = 5\ \Omega$ versus static $R_{dc} = 35\ \Omega$.

Example 3 — Designing a Zener regulator

Given: a $24$ V unregulated supply must hold a load at $12$ V using a $12$ V Zener, with the load drawing $100$ mA; the Zener is to carry $20$ mA under this load.

Formula: $I_s = I_Z + I_L$, $R_s = \dfrac{V_{in} - V_Z}{I_s}$, $P_Z = V_Z I_Z$.

Working: series current $I_s = 20 + 100 = 120$ mA $= 0.12$ A; series resistor $R_s = \dfrac{24 - 12}{0.12} = 100\ \Omega$; Zener power on load $P_Z = 12 \times 0.020 = 0.24$ W. With $R_s$ fixed, $I_s$ stays $0.12$ A, so removing the load ($I_L = 0$) dumps all of it into the Zener: $I_Z = 120$ mA and $P_Z = 12 \times 0.12 = 1.44$ W — the worst case the diode must survive.

Answer: $R_s = 100\ \Omega$, $P_Z = 0.24$ W on load, rising to $1.44$ W at no load.

Example 4 — Conductivity of doped silicon

Given: silicon with $n_i = 1.5 \times 10^{16}$ per m$^3$ doped n-type to $n_e = 2.5 \times 10^{22}$ per m$^3$; $\mu_e = 0.12$ and $\mu_h = 0.045$ m$^2$/V s, with $e = 1.6 \times 10^{-19}$ C.

Formula: minority $n_h = \dfrac{n_i^2}{n_e}$; conductivity $\sigma \approx e\,n_e\mu_e$ (majority carriers dominate); resistivity $\rho = \dfrac{1}{\sigma}$.

Working: minority holes $n_h = \dfrac{(1.5 \times 10^{16})^2}{2.5 \times 10^{22}} = \dfrac{2.25 \times 10^{32}}{2.5 \times 10^{22}} = 9 \times 10^{9}$ per m$^3$. Their contribution $e\,n_h\mu_h \approx 6.5 \times 10^{-11}$ S/m is negligible, so $\sigma = (1.6 \times 10^{-19})(2.5 \times 10^{22})(0.12) = 480$ S/m and $\rho = \dfrac{1}{480} = 2.08 \times 10^{-3}\ \Omega$ m.

Answer: $n_h = 9 \times 10^{9}$ per m$^3$, $\sigma = 480$ S/m and $\rho = 2.08 \times 10^{-3}\ \Omega$ m.

Example 5 — Logic-gate network and Boolean identity

Given: inputs $A$ and $B$ feed a NOR gate ($P = \overline{A + B}$) and, in parallel, an AND gate ($Q = A\cdot B$); their outputs feed an OR gate, $Y = P + Q$.

Formula: substitute and simplify with De Morgan on the NOR: $Y = \overline{A+B} + AB = \overline{A}\,\overline{B} + AB$.

Working: $\overline{A}\,\overline{B} + AB$ is 1 exactly when the two inputs are equal (both 0 or both 1) — that is the XNOR function. Checking two cases: for $(A,B) = (1,1)$, $P = \overline{1+1} = 0$ and $Q = 1$, so $Y = 0 + 1 = 1$; for $(1,0)$, $P = \overline{1+0} = 0$ and $Q = 0$, so $Y = 0 + 0 = 0$.

Answer: $Y = \overline{A}\,\overline{B} + AB$, an XNOR (equivalence) gate; $Y = 1$ for $(1,1)$ and $Y = 0$ for $(1,0)$.

Example 6 — Common-emitter voltage and power gain

Given: a CE amplifier with $\beta = 80$, input resistance $R_{in} = 1\ \text{k}\Omega$, collector load $R_C = 4\ \text{k}\Omega$, driven by a $10$ mV signal.

Formula: $A_v = \beta\,\dfrac{R_C}{R_{in}}$, $V_{out} = A_v V_{in}$, $A_p = \beta \times A_v$.

Working: resistance ratio $\dfrac{R_C}{R_{in}} = \dfrac{4}{1} = 4$; voltage gain $A_v = 80 \times 4 = 320$; output $V_{out} = 320 \times 10 = 3200$ mV $= 3.2$ V; power gain $A_p = 80 \times 320 = 2.56 \times 10^{4}$.

Answer: $A_v = 320$, $V_{out} = 3.2$ V and $A_p = 2.56 \times 10^{4}$.

Example 7 — Ripple factor and efficiency of a full-wave rectifier

Given: an ideal full-wave rectifier with peak load current $I_m = 2.0$ A, using $I_{dc} = \dfrac{2I_m}{\pi}$ and $I_{rms} = \dfrac{I_m}{\sqrt{2}}$.

Formula: ripple factor $r = \sqrt{\left(\dfrac{I_{rms}}{I_{dc}}\right)^2 - 1}$ and efficiency $\eta = \dfrac{I_{dc}^2}{I_{rms}^2}$.

Working: $I_{dc} = \dfrac{2 \times 2.0}{\pi} = 1.27$ A and $I_{rms} = \dfrac{2.0}{\sqrt{2}} = 1.41$ A, so $\dfrac{I_{rms}}{I_{dc}} = 1.111$. Then $r = \sqrt{1.111^2 - 1} = \sqrt{0.234} = 0.48$ and $\eta = \dfrac{I_{dc}^2}{I_{rms}^2} = \dfrac{1.62}{2.00} = 0.81$.

Answer: ripple factor $r = 0.48$ and efficiency $\eta \approx 0.81$ (about 81%) — the standard full-wave figures.

Example 8 — Transconductance and voltage gain

Given: a base-emitter change $\Delta V_{BE} = 10$ mV produces a collector-current change $\Delta I_C = 2.0$ mA; the collector load is $R_C = 1\ \text{k}\Omega$ and the input signal is $5$ mV.

Formula: $g_m = \dfrac{\Delta I_C}{\Delta V_{BE}}$, $A_v = g_m R_C$, $V_{out} = A_v V_{in}$.

Working: transconductance $g_m = \dfrac{2.0 \times 10^{-3}}{10 \times 10^{-3}} = 0.20$ S (that is, 200 mA/V); voltage gain $A_v = g_m R_C = 0.20 \times 1000 = 200$; output $V_{out} = 200 \times 5 = 1000$ mV $= 1.0$ V.

Answer: $g_m = 0.20$ S, $A_v = 200$ and $V_{out} = 1.0$ V.